1. Field of the Invention
The present invention relates to a device for evaluating a characteristic of an insulated gate transistor which extracts the effective channel length and also the series resistance of the insulated gate transistor.
2. Description of the Background Art
The resistance-based method is intended for extracting a series resistance Rsd and an effective channel length Leff. However, the resistance-based method determines a channel length reduction DL (=Lmxe2x88x92Leff) in place of the effective channel length Leff where Lm is a mask channel length (designed channel length). The resistance-based method carries out the extraction on the assumption that a total drain-to-source resistance Rtot is the sum of the series resistance Rsd and a channel resistance Rch. A relationship which holds between the effective channel length Leff and the channel resistance Rch is such that the channel resistance Rch is the product of the effective channel length Leff and a channel resistance f per unit length. FIG. 24 conceptually shows the relationship between the channel resistance Rch, the series resistance Rsd, the effective channel length Leff, the mask channel length Lm, and the channel length reduction DL. The relationship shown in FIG. 25 approximately holds between the total drain-to-source resistance Rtot and the mask channel length Lm. Specifically, with a gate voltage Vgs or the gate voltage Vgs minus a threshold voltage Vth held constant, the total drain-to-source resistance Rtot changes in constant proportion to the mask channel length Lm. The gate voltage Vgs minus the threshold voltage Vth is referred to hereinafter as a gate overdrive Vgt. It is assumed that Rtotxe2x88x92Lm lines for various values of the gate overdrive Vgt intersect at one point. The mask channel length Lm coordinate of the point of intersection is represented by DL*, and the total drain-to-source resistance Rtot coordinate thereof is represented by Rsd*. The symbol * which follows the reference character representing a value indicates that the value is determined based on such a relationship which holds between the total drain-to-source resistance Rtot and the mask channel length Lm, in other words, based on characteristic curves plotted in the X-Y plane defined by an X-axis which denotes the mask channel length and a Y-axis which denotes the total drain-to-source resistance.
Many types of resistance-based method have been hithertofore proposed, among which the Terada-Muta-Chern method (referred to hereinafter as the TMC method) and the Shift and Ratio method (referred to hereinafter as the SandR method) are generally used.
First, the TMC method is described with reference to FIGS. 26 and 27. Expression (1) providing the relationship between the total drain-to-source resistance Rtot, the effective channel length Leff, the resistance f per channel unit length and the series resistance Rsd is transformed into Expression (4) by using Expression (2) providing the relationship between the effective channel length Leff, the mask channel length Lm and the channel length reduction DL and Expression (3) providing a variable A.
Rtot=Leffxc2x7f+Rsdxe2x80x83xe2x80x83(1)
Leff=Lmxe2x88x92DLxe2x80x83xe2x80x83(2)
Axe2x89xa1xe2x88x92DLxc2x7f+Rsdxe2x80x83xe2x80x83(3)
Rtot=Lmxc2x7f+Axe2x80x83xe2x80x83(4)
It is found from Expression (4) that the resistance f per unit length and the variable A are determined from the relationship between the total drain-to-source resistance Rtot and the mask channel length Lm. The total drain-to-source resistance Rtot, the mask channel length Lm and the resistance f per unit length which serve as a function of the gate overdrive Vgt must be determined, with the gate overdrive Vgt held constant. As shown in FIG. 26, for example, a plurality of lines may be plotted for different gate overdrives Vgt1, Vgt2, . . . by measuring the total drain-to-source resistance Rtot of MOS transistors having the mask channel length Lm which takes values Lm1 to Lm4. Then, values f1, f2, . . . of the resistance f per unit length and values A1, A2, . . . of the variable A defined in Expression (3) are found from the slopes and Rtot-intercepts of the respective plotted lines.
With attention focused on Expression (3), the TMC method extracts the channel length reduction DL and the series resistance Rsd based on the slope and Rtot-intercept of the line of the graph of FIG. 27 since the values f1, f2, . . . of the resistance f and the values A1, A2, . . . of the variable A which are found in the above described manner are in the relationship shown in the graph of FIG. 27. The threshold voltage Vth of the MOS transistor which serves as a reference for the calculation of the gate overdrive Vgt is determined by extrapolation from a source-drain current versus gate voltage characteristic as shown in FIG. 28.
The TMC method is of low extraction accuracy because of the uncertainty of the threshold voltage Vth obtained by the extrapolation, and thus is not adaptable for an application to transistors which are not greater than 0.35 xcexcm in channel length. FIG. 29 shows the influence of the uncertainty of the gate overdrive Vgt in the case where the mask channel length Lm coordinate value DL* of the point of intersection is determined using two transistors. There is no problem if the gate overdrives Vgt of the two transistors differ by the same amount from the true Vgt. On the other hand, a 0.01 V difference in gate overdrive Vgt between the two transistors, for example, causes an error on the order of slightly less than 0.01 xcexcm. The extraction error of the threshold voltage Vth of one of the transistors which has a shorter gate length due to the series resistance Rsd is about xe2x88x920.02 V when the extrapolation is used for the extraction of the threshold voltage Vth. Thus, the extraction error of the channel length reduction DL resulting from the uncertainty of the threshold voltage Vth is estimated to be about xe2x88x920.01 to about xe2x88x920.02 xcexcm. Additionally, when data obtained by measuring the gate voltage Vgs at intervals of 0.1 V are used, there is a likelihood that a quantization error causes the extraction error of the threshold voltage Vth on the order of xc2x10.01V, thereby causing the extraction error of the channel length reduction DL.
Next, the SandR method is described below with reference to FIGS. 30 and 31. The SandR method provides the channel length reduction DL using Expression (5) using two MOS transistors Sh and Lo which are equal in mask channel width Wm but differ in mask channel length Lm. The MOS transistor Lo is a transistor having a channel length long enough to ignore the influence of the channel length reduction DL, and the MOS transistor Sh is a transistor having a shorter channel length.                     DL        =                              L            mSh                    -                                    L              mLo                                      ⟨              ri              ⟩                                                          (        5        )            
where   ri  =                    R        totLo        xe2x80x2            ⁢              (                  V          gs                )                            R        totSh        xe2x80x2            ⁢              (                              V            gs                    +                      δ            0                          )            
where the marks xe2x80x9c less than  greater than xe2x80x9d denote an average value in a given region of the gate overdrive Vgt, the prime denotes a first derivative with respect to the gate overdrive Vgt, and xcex40 is the difference (VthShxe2x88x92VthLo) between the threshold voltages VthSh and VthLo of the two MOS transistors Sh and Lo.
In other words, the SandR method results in the problem of determining  less than ri greater than  for the correct gate overdrive Vgt. An algorithm for determining  less than ri greater than  is as follows:
Step 1: extracting the threshold voltage VthLo of the transistor Lo
Step 2: shifting RtotShxe2x80x2to RtotShxe2x80x2+xcex4 to calculate the average value  less than ri greater than  and a standard deviation "sgr" (ri) in a given region of the gate overdrive VgtLo (=Vgsxe2x88x92VthLo) (See FIG. 30) Step 3: repeating Step 2, with the shift amount xcex4 changed Step 4: providing  less than ri greater than  as  less than ri greater than xcex4=xcex40 where xcex40 is the shift amount xcex4 when "sgr" (ri)2 is a minimum, based on the result of Step 3.
It should be noted that the changes in the shift amount xcex4 are equivalent to changes in the threshold voltage VthSh of the short transistor Sh.
The SandR method reduces the error resulting from the uncertainty of the threshold voltage Vth which is the problem with the TMC method, but presents another problem in that the region of the gate overdrive Vgt to be calculated must be adequately determined so that the appropriate channel length reduction DL is obtained. The SandR method determines  less than ri greater than  on the assumption that, when the gate overdrive Vgt is small, ri is a constant value, in spite of the dependence of ri upon the gate overdrive Vgt. As a result, the channel length reduction DL extracted by the SandR method is dependent upon the region of the gate overdrive Vgt (See FIG. 32).
The SandR method requires the mask channel length LmLo of the long transistor Lo to be sufficiently greater than the mask channel length LmSh of the short transistor Sh. As the mask channel length LmLo of the long transistor Lo approaches the mask channel length LmSh of the short transistor Sh,  less than ri greater than  approaches xe2x80x9c1,xe2x80x9d and the value of the channel length reduction DL accordingly approaches xe2x80x9c0xe2x80x9d as will be found from Expression (5) (See FIG. 33). This problem results from the formulation in defiance of the dependence of the channel length reduction DL and the series resistance Rsd upon the gate overdrive Vgt.
As above described, the conventional resistance-based method is disadvantageous in the low extraction accuracy of the effective channel length and the series resistance, and in the dependence of the extraction accuracy thereof upon the setting of parameters. For example, the TMC method extracts the effective channel length and the series resistance with low accuracy because of the error resulting from the uncertainty of the threshold voltage determined by the extrapolation. The SandR method reduces the extraction error of the effective channel length resulting from the uncertainty of the threshold voltage, but has the drawback that the value of the effective channel length to be extracted changes greatly depending on the range of the gate overdrive Vgt to be specified for calculation.
A first aspect of the present invention is intended for a method of evaluating a characteristic of an insulated gate transistor. According to the present invention, the method comprises the steps of: (a) preparing at least two insulated gate transistors differing from each other only in mask channel length and including a first insulated gate transistor having a longer channel length and a second insulated gate transistor having a shorter channel length; (b) extracting a threshold voltage for the first insulated gate transistor to estimate a threshold voltage for the second insulated gate transistor to define the estimated value of the threshold voltage as a first estimated value; (c) extracting a hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when a first gate overdrive and a second gate overdrive are slightly changed, based on a characteristic curve plotted in an X-Y plane with the mask channel length measured on an X-axis and the total drain-to-source resistance measured on a Y axis, the characteristic curve indicating the relationship between the mask channel length of the first and second insulated gate transistors and the total drain-to-source resistance on the condition that the first and second gate overdrives are equal, the value of the mask channel length and the value of the total drain-to-source resistance at the hypothetical point being defined as second and third estimated values, respectively, and also extracting the slope of the characteristic curve at the hypothetical point to define the extracted value of the slope as a fourth estimated value, the first gate overdrive being defined as the difference between the gate voltage of the first insulated gate transistor and the extracted threshold voltage of the first insulated gate transistor, the second gate overdrive being defined as the difference between the gate voltage of the second insulated gate transistor and the first estimated value; (d) repeating the step (c) with the first estimated value changed; (e) determining optimum second to fourth estimated values that are respective ones of the second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed, to determine an optimum first estimated value associated with the optimum second to fourth estimated values, thereby to determine a true threshold voltage of the second insulated gate transistor based on the optimum first estimated value; and (f) determining the difference between the mask channel length and an effective channel length, and a series resistance, based on the true threshold voltage.
Preferably, according to a second aspect of the present invention, in the method of the first aspect, the characteristic curve is approximated in the step (e) using a first line drawn in the X-Y plane and passing through first and second points, the first point being given for the first insulated gate transistor when the first gate overdrive has a first value, the second point being given for the second insulated gate transistor when the second gate overdrive has the first value.
Preferably, according to a third aspect of the present invention, in the method of the second aspect, the optimum second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed are determined in the step (e) using the relationship expressed by       F    ⁡          (              δ        ,                  V          gtLo                    )        =                    dL        *            ⁡              (                  δ          ,                      V            gtLo                          )              +                            f          ⁡                      (                          δ              ,                              V                gtLo                                      )                                                f            xe2x80x2                    ⁡                      (                          δ              ,                              V                gtLo                                      )                              ·                        dL                      *            xe2x80x2                          ⁡                  (                      δ            ,                          V              gtLo                                )                      -                  DL        *            ⁡              (                  δ          ,                      V            gtLo                          )            
where xcex4 is the difference between the first estimated value of the threshold voltage of the second insulated gate transistor and the threshold voltage of the first insulated gate transistor, VgtLo is the first gate overdrive, dL* is an X-intercept provided by extrapolation from the characteristic curve, f is the slope of the characteristic curve at the hypothetical point, DL* is the X coordinate of the hypothetical point, and the prime denotes a first derivative with respect to VgtLo.
Preferably, according to a fourth aspect of the present invention, in the method of the second aspect, the optimum second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed are determined in the step (e) using the relationship expressed by       F    ⁡          (              δ        ,                  V          gtLo                    )        =                                          f            2                    ⁡                      (                          δ              ,                              V                gtLo                                      )                                                f            xe2x80x2                    ⁡                      (                          δ              ,                              V                gtLo                                      )                              ·                        dL                      *            xe2x80x2                          ⁡                  (                      δ            ,                          V              gtLo                                )                      -                  R        sd        *            ⁡              (                  δ          ,                      V            gtLo                          )            
where xcex4 is the difference between the first estimated value of the threshold voltage of the second insulated gate transistor and the threshold voltage of the first insulated gate transistor, VgtLo is the first gate overdrive, dL* is an X-intercept provided by extrapolation from the characteristic curve, f is the slope of the characteristic curve at the hypothetical point, Rsd* is the Y coordinate of the hypothetical point, and the prime denotes a first derivative with respect to VgtLo.
Preferably, according to a fifth aspect of the present invention, in the method of the second aspect, the optimum second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed are determined in the step (e) using the relationship expressed by       F    ⁡          (              δ        ,                  V          gtLo                    )        =                    R        *            ⁡              (                  δ          ,                      V            gtLo                          )              -                            f          ⁡                      (                          δ              ,                              V                gtLo                                      )                                                f            xe2x80x2                    ⁡                      (                          δ              ,                              V                gtLo                                      )                              ·                        R                      *            xe2x80x2                          ⁡                  (                      δ            ,                          V              gtLo                                )                      -                  R        sd        *            ⁡              (                  δ          ,                      V            gtLo                          )            
where xcex4 is the difference between the first estimated value of the threshold voltage of the second insulated gate transistor and the threshold voltage of the first insulated gate transistor, VgtLo is the first gate overdrive, R* is a Y-intercept provided by extrapolation from the characteristic curve, f is the slope of the characteristic curve at the hypothetical point, Rsd* is the Y coordinate of the hypothetical point, and the prime denotes a first derivative with respect to VgtLo.
Preferably, according to a sixth aspect of the present invention, in the method of the second aspect, the optimum second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed are determined in the step (e) using the relationship expressed by       F    ⁢          (              δ        ,                  V          gtLo                    )        =                              R                      *            xe2x80x2                          ⁢                  (                      δ            ,                          V              gtLo                                )                                      f          xe2x80x2                ⁢                  (                      δ            ,                          V              gtLo                                )                      +                  DL        *            ⁢              (                  δ          ,                      V            gtLo                          )            
where xcex4 is the difference between the first estimated value of the threshold voltage of the second insulated gate transistor and the threshold voltage of the first insulated gate transistor, VgtLo is the first gate overdrive, R* is a Y-intercept provided by extrapolation from the characteristic curve, f is the slope of the characteristic curve at the hypothetical point, DL* is the X coordinate of the hypothetical point, and the prime denotes a first derivative with respect to VgtLo.
A seventh aspect of the present invention is intended for a method of evaluating a characteristic of an insulated gate transistor. According to the present invention, the method comprises the steps of: (a) preparing at least two insulated gate transistors differing from each other only in mask channel length and including a first insulated gate transistor having a longer channel length and a second insulated gate transistor having a shorter channel length; (b) extracting a threshold voltage for the first insulated gate transistor to estimate a threshold voltage for the second insulated gate transistor to define the estimated value of the threshold voltage as a first estimated value; (c) extracting a hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when a first gate overdrive and a second gate overdrive are slightly changed, based on a characteristic curve plotted in an X-Y plane with the mask channel length measured on an X-axis and the total drain-to-source resistance measured on a Y-axis, the characteristic curve indicating the relationship between the mask channel length of the first and second insulated gate transistors and the total drain-to-source resistance on the condition that the first and second gate overdrives are equal, the value of the mask channel length at the hypothetical point being defined as a second estimated value, the first gate overdrive being defined as the difference between the gate voltage of the first insulated gate transistor and the extracted threshold voltage of the first insulated gate transistor, the second gate overdrive being defined as the difference between the gate voltage of the second insulated gate transistor and the first estimated value; (d) repeating the step (c) with the first estimated value changed; (e) determining an optimum first estimated value among the first and second estimated values associated with the steps (b), (c) and (d), the optimum first estimated value satisfying that a characteristic curve indicating the relationship between the second gate overdrive measured on an X-axis and the second estimated value measured on a Y-axis has a predetermined configuration in a predetermined range of the second gate overdrive, to determine a true threshold voltage of the second insulated gate transistor based on the optimum first estimated value; and (f) determining the difference between the mask channel length and an effective channel length, and a series resistance, based on the true threshold voltage.
Preferably, according to an eighth aspect of the present invention, in the method of the seventh aspect, the characteristic curve includes a plurality of characteristic curves, and the step (e) comprises the step of determining among the plurality of characteristic curves an optimum characteristic curve exhibiting the second estimated value which converge best on a constant value within the predetermined range to detect the characteristic curve having the predetermined configuration.
According to a ninth aspect of the present invention, a method of evaluating a characteristic of an insulated gate transistor comprises the steps of: (a) extracting an effective channel length from each of at least two drain current versus gate voltage characteristics differing from each other in source-drain voltage, by using a resistance-based method; and (b) determining an effective channel length by extrapolation from the effective channel lengths extracted for different source-drain voltages.
According to a tenth aspect of the present invention, a method of fabricating an insulated gate transistor comprises the steps of: producing at least two insulated gate transistors differing from each other only in mask channel length; measuring a drain current characteristic of the two insulated gate transistors, with a gate voltage and a source-drain voltage changed; determining a threshold voltage and an effective channel length of the insulated gate transistors by using a method of evaluating a characteristic of an insulated gate transistor as recited in one of the first to ninth aspects; and judging specification fitness of the drain current characteristic, the threshold voltage and the effective channel length.
An eleventh aspect of the present invention is intended for an insulated gate transistor characteristic evaluation device using at least two insulated gate transistors differing from each other only in mask channel length and including a first insulated gate transistor having a longer channel length and a second insulated gate transistor having a shorter channel length, the insulated gate transistor characteristic evaluation device for evaluating a characteristic of the second insulated gate transistor using a characteristic of the first insulated gate transistor as a reference. According to the present invention, the insulated gate transistor characteristic evaluation device comprises: threshold voltage estimation means for extracting a threshold voltage for the first insulated gate transistor to estimate a threshold voltage for the second insulated gate transistor to define the estimated value as a first estimated value; extraction means for extracting a hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when first and second gate overdrives are slightly changed, based on a characteristic curve drawn in an X-Y plane with the mask channel length measured on an X-axis and the total drain-to-source resistance measured on a Y-axis, the characteristic curve indicating the relationship between the mask channel length of the first and second insulated gate transistors and the total drain-to-source resistance, the value of the mask channel length and the value of the total drain-to-source resistance at the hypothetical point being defined as second and third estimated values, respectively, the extraction means also extracting the slope of the characteristic curve at the hypothetical point to define the value of the slope as a fourth estimated value, the first gate overdrive being defined as the difference between the gate voltage of the first insulated gate transistor and the extracted threshold voltage of the first insulated gate transistor, the second gate overdrive being defined as the difference between the gate voltage of the first and second insulated gate transistors and the firs t estimated value; threshold voltage determination means for determining optimum second to fourth estimated values that are respective ones of the second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed, to determine an optimum first estimated value associated with the optimum second to fourth estimated values, thereby to determine a true threshold voltage of the second insulated gate transistor based on the optimum first estimated value; and channel length reduction determination means for determining the difference between the mask channel length and an effective channel length, and a series resistance, based on the true threshold voltage.
Preferably, according to a twelfth aspect of the present invention, in the insulated gate transistor characteristic evaluation device of the eleventh aspect, the extraction means approximates the characteristic curve using a first line drawn in the X-Y plane and passing through first and second points, the first point being given for the first insulated gate transistor when the first gate overdrive has a first value, the second point being given for the second insulated gate transistor when the second gate overdrive has the first value.
Preferably, according to a thirteenth aspect of the present invention, in the insulated gate transistor characteristic evaluation device of the twelfth aspect, the threshold voltage determination means determines the optimum second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed, using the relationship expressed by       F    ⁡          (              δ        ,                  V          gtLo                    )        =                    dL        *            ⁡              (                  δ          ,                      V            gtLo                          )              +                            f          ⁡                      (                          δ              ,                              V                gtLo                                      )                                                f            xe2x80x2                    ⁡                      (                          δ              ,                              V                gtLo                                      )                              ·                        dL                      *            xe2x80x2                          ⁡                  (                      δ            ,                          V              gtLo                                )                      -                  DL        *            ⁡              (                  δ          ,                      V            gtLo                          )            
where xcex4 is the difference between the first estimated value of the threshold voltage of the second insulated gate transistor and the threshold voltage of the first insulated gate transistor, VgtLo is the first gate overdrive, dL* is an X-intercept provided by extrapolation from the characteristic curve, f is the slope of the characteristic curve at the hypothetical point, DL* is the X coordinate of the hypothetical point, and the prime denotes a first derivative with respect to VgtLo.
Preferably, according to a fourteenth aspect of the present invention, in the insulated gate transistor characteristic evaluation device of the twelfth aspect, the threshold voltage determination means determines the optimum second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed, using the relationship expressed by       F    ⁡          (              δ        ,                  V          gtLo                    )        =                                          f            2                    ⁡                      (                          δ              ,                              V                gtLo                                      )                                                f            xe2x80x2                    ⁡                      (                          δ              ,                              V                gtLo                                      )                              ·                        dL                      *            xe2x80x2                          ⁡                  (                      δ            ,                          V              gtLo                                )                      -                  R        sd        *            ⁡              (                  δ          ,                      V            gtLo                          )            
where xcex4 is the difference between the first estimated value of the threshold voltage of the second insulated gate transistor and the threshold voltage of the first insulated gate transistor, VgtLo is the first gate overdrive, dL* is an X-intercept provided by extrapolation from the characteristic curve, f is the slope of the characteristic curve at the hypothetical point, Rsd* is the Y coordinate of the hypothetical point, and the prime denotes a first derivative with respect to VgtLo.
Preferably, according to a fifteenth aspect of the present invention, in the insulated gate transistor characteristic evaluation device of the twelfth aspect, the threshold voltage determination means determines the optimum second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed, using the relationship expressed by       F    ⁡          (              δ        ,                  V          gtLo                    )        =                    R        *            ⁡              (                  δ          ,                      V            gtLo                          )              -                            f          ⁡                      (                          δ              ,                              V                gtLo                                      )                                                f            xe2x80x2                    ⁡                      (                          δ              ,                              V                gtLo                                      )                              ·                        R                      *            xe2x80x2                          ⁡                  (                      δ            ,                          V              gtLo                                )                      -                  R        sd        *            ⁡              (                  δ          ,                      V            gtLo                          )            
where xcex4 is the difference between the first estimated value of the threshold voltage of the second insulated gate transistor and the threshold voltage of the first insulated gate transistor, VgtLo is the first gate overdrive, R* is a Y-intercept provided by extrapolation from the characteristic curve, f is the slope of the characteristic curve at the hypothetical point, Rsd* is the Y coordinate of the hypothetical point, and the prime denotes a first derivative with respect to VgtLo.
Preferably, according to a sixteenth aspect of the present invention, in the insulated gate transistor characteristic evaluation device of the twelfth aspect, the threshold voltage determination means determines the optimum second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed, using the relationship expressed by       F    ⁢          (              δ        ,                  V          gtLo                    )        =                              R                      *            xe2x80x2                          ⁢                  (                      δ            ,                          V              gtLo                                )                                      f          xe2x80x2                ⁢                  (                      δ            ,                          V              gtLo                                )                      +                  DL        *            ⁢              (                  δ          ,                      V            gtLo                          )            
where xcex4 is the difference between the first estimated value of the threshold voltage of the second insulated gate transistor and the threshold voltage of the first insulated gate transistor, VgtLo is the first gate overdrive, R* is a Y-intercept provided by extrapolation from the characteristic curve, f is the slope of the characteristic curve at the hypothetical point, DL* is the X coordinate of the hypothetical point, and the prime denotes a first derivative with respect to VgtLo.
A seventeenth aspect of the present invention is intended for an insulated gate transistor characteristic evaluation device using at least two insulated gate transistors differing from each other only in mask channel length and including a first insulated gate transistor having a longer channel length and a second insulated gate transistor having a shorter channel length, the insulated gate transistor characteristic evaluation device for evaluating a characteristic of the second insulated gate transistor using a characteristic of the first insulated gate transistor as a reference. According to the present invention, the insulated gate transistor characteristic evaluation device comprises: threshold voltage estimation means for extracting a threshold voltage for the first insulated gate transistor to estimate a threshold voltage for the second insulated gate transistor to define the estimated value as a first estimated value; extraction means for extracting a hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when a first gate overdrive and a second gate overdrive are slightly changed, based on a characteristic curve drawn in an X-Y plane with the mask channel length measured on an X-axis and the total drain-to-source resistance measured on a Y-axis, the characteristic curve indicating the relationship between the mask channel length of the first and second insulated gate transistors and the total drain-to-source resistance, the values of the mask channel length at the hypothetical point being defined as a second estimated value, the first gate overdrive being defined as the difference between the gate voltage of the first insulated gate transistor and the extracted threshold voltage of the first insulated gate transistor, the second gate overdrive being defined as the difference between the gate voltage of the second insulated gate transistor and the first estimated value; threshold voltage determination means for determining a first estimated value by the second estimated value, the first estimated value satisfying that a characteristic curve indicating the relationship between the second gate overdrive measured on an X-axis and the second estimated values measured on a Y-axis has a predetermined configuration in a predetermined range of the second gate overdrive, to determine the determined first estimated value as a true threshold voltage of the second insulated gate transistor; and channel length reduction determination means for determining the difference between the mask channel length and an effective channel length, and a series resistance, based on the true threshold voltage.
Preferably, according to an eighteenth aspect of the present invention, in the insulated gate transistor characteristic evaluation device of the seventeenth aspect, the threshold voltage determination means determines a standard deviation of the second estimated value in the predetermined range to detect the characteristic curve having the predetermined configuration.
According to a nineteenth aspect of the present invention, an insulated gate transistor characteristic evaluation device comprises: calculation means for extracting an effective channel length from each of at least two drain current versus gate voltage characteristics differing from each other in source-drain voltage, by using a resistance-based method; and output means for determining an effective channel length by extrapolation from the effective channel lengths extracted for different source-drain voltages.
A twentieth aspect of the present invention is intended or a computer readable recording medium storing therein a characteristic evaluation program and using at least two insulated gate transistors differing from each other only in mask channel length and including a first insulated gate transistor having a longer channel length and a second insulated gate transistor having a shorter channel length, the computer readable recording medium for causing a computer to evaluate a characteristic of the second insulated gate transistor using a characteristic of the first insulated gate transistor as a reference. According to the present invention, the computer readable recording medium comprises: means for causing the computer to extract a threshold voltage for the first insulated gate transistor to estimate a threshold voltage for the second insulated gate transistor to define the estimated value as a first estimated value; means for causing the computer to extract a hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when a first gate overdrive and a second gate overdrive are slightly changed, based on a characteristic curve drawn in an X-Y plane with the mask channel length measured on an X-axis and the total drain-to-source resistance measured on a Y-axis, the characteristic curve indicating the relationship between the mask channel length of the first and second insulated gate transistors and the total drain-to-source resistance on the condition that the first and second gate overdrives are equal, the value of the mask channel length and the value of the total drain-to-source resistance at the hypothetical point being defined as second and third estimated values, respectively, the means also causing the computer to extract the slope of the characteristic curve at the hypothetical point to define the value of the slope as a fourth estimated value, the first gate overdrive being defined as the difference between the gate voltage of the first insulated gate transistor and the extracted threshold voltage of the first insulated gate transistor, the second gate overdrive being defined as the difference between the gate voltage of the second insulated gate transistor and the first estimated value; means for causing the computer to determine optimum second to fourth estimated values that are respective ones of the second to fourth estimated values which satisfy that the amount of change in the third estimated value equals the product of the amount of change in the second estimated value and the fourth estimated value when the first and second gate overdrives are slightly changed, to determine an optimum first estimated value associated with the optimum second to fourth estimated values, thereby to determine a true threshold voltage of the second insulated gate transistor based on the optimum first estimated value; and means for causing the computer to determine the difference between the mask channel length and an effective channel length, and a series resistance, based on the true threshold voltage.
An twenty-first aspect of the present invention is intended for a computer readable recording medium storing therein a characteristic evaluation program and using at least two insulated gate transistors differing from each other only in mask channel length and including a first insulated gate transistor having a longer channel length and a second insulated gate transistor having a shorter channel length, the computer readable recording medium for causing a computer to evaluate a characteristic of the second insulated gate transistor using a characteristic of the first insulated gate transistor as a reference. According to the present invention, the computer readable recording medium comprises: means for causing the computer to extract a threshold voltage for the first insulated gate transistor to estimate a threshold voltage for the second insulated gate transistor to define the estimated value as a first estimated value; means for causing the computer to extract a hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when a first gate overdrive and a second gate overdrive are slightly changed, based on a characteristic curve drawn in an X-Y plane with the mask channel length measured on an X-axis and the total drain-to-source resistance measured on a Y-axis, the characteristic curve indicating the relationship between the mask channel length of the first and second insulated gate transistors and the total drain-to-source resistance on the condition that the first and second gate overdrives are equal, the value of the mask channel length at the hypothetical point being defined as a second estimated value, the first gate overdrive being defined as the difference between the gate voltage of the first insulated gate transistor and the extracted threshold voltage of the first insulated gate transistor, the second gate overdrive being defined as the difference between the gate voltage of the second insulated gate transistor and the first estimated value; means for causing the computer to determine a first estimated value by the second estimated value, the first estimated value satisfying that a characteristic curve indicating the relationship between the second gate overdrive measured on an X-axis and the second estimated value measured on a Y-axis has a predetermined configuration in a predetermined range of the second gate overdrive, to determine the determined first estimated value as a true threshold voltage of the second insulated gate transistor; and means for causing the computer to determine the difference between the mask channel length and an effective channel length, and a series resistance, based on the true threshold voltage.
As above described, the method of evaluating the characteristic of the insulated gate transistor according to the first and seventh aspects of the present invention, the insulated gate transistor characteristic evaluation device according to the eleventh and seventeenth aspects of the present invention and the computer readable recording medium storing therein the characteristic evaluation program according to the twentieth and twenty-first aspects of the present invention may accurately extract the threshold voltage of the second insulated gate transistor independently of the range of the second gate overdrive to increase the extraction accuracy of the effective channel length and the series resistance.
The method of evaluating the characteristic of the insulated gate transistor according to the second aspect of the present invention and the insulated gate transistor characteristic evaluation device according to the twelfth aspect of the present invention approximate the characteristic curve using the line. Then, the hypothetical point may be determined as a point of intersection of lines, and the slope at the point of intersection may be determined as the slope of the lines. This is effective in facilitating the extraction of the hypothetical point and the slope at the hypothetical point.
The method of evaluating the characteristic of the insulated gate transistor according to the third to sixth aspects of the present invention and the insulated gate transistor characteristic evaluation device according to the thirteenth to sixteenth aspects of the present invention need not determine a derivative of the coordinates of the hypothetical point with respect to the gate overdrive. This might reduce errors since the coordinate of the point of intersection determined from the characteristic curve are more significantly influenced by noises than are the Y- and X-intercepts of the characteristic curve. Thus, the derivative of the coordinates of the hypothetical point with respect to the gate overdrive has a greater error than does the derivative of the intercepts.
The method of evaluating the characteristic of the insulated gate transistor according to the eighth aspect of the present invention and the insulated gate transistor characteristic evaluation device according to the eighteenth aspect of the present invention facilitate the detection of the characteristic curve having the predetermined configuration to readily increase the speed of the characteristic evaluation.
The method of evaluating the characteristic of the insulated gate transistor according to the ninth aspect of the present invention and the insulated gate transistor characteristic evaluation device according to the nineteenth aspect of the present invention may eliminate errors resulting from drift velocity saturation to increase the extraction accuracy.
The method of fabricating the insulated gate transistor according to the tenth aspect of the present invention may extract the threshold voltage and the effective channel length with high accuracy and in a non-destructive manner using the method of evaluating the characteristic of the insulated gate transistor, thereby to reduce the time required for the fabrication.
It is therefore an object of the present invention to provide a resistance-based method which extracts an effective channel length and a series resistance with increased accuracy.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.